Modern integrated circuits are extremely complex devices that are fabricated using equally complex processes. As the term is used herein, “integrated circuit” includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III–V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices. Because of the complexity of integrated circuits and the processes by which they are formed, it can be extremely difficult to determine the reasons why some devices function properly and other devices function improperly, or fail altogether.
Integrated circuits are typically manufactured on thin silicon substrates, commonly referred to as wafers. The wafer is divided up onto smaller rectangular sections for each device, typically known as the die or device. The methods and other embodiments according to the present invention can be applied to processes that are performed on other substrates to make other devices or components, such as flat panel display manufacturing, which is performed on rectangular glass substrates. Thus, this disclosure generally refers to substrates, substrate profiles, and substrate contact points, even though silicon wafer processing may be the most common application for the embodiments of the invention. It is appreciated that the same or similar methods are just as applicable to the analysis of a wide variety of substrates. Wafer test yield of die, or simply yield, is predominantly used as an example herein of an important dependent variable of interest. However, it is appreciated that any other dependent variable that is spatially associated with the substrate can also be used.
One method to assist in failure analysis is mapping important variables, such as yield, according to the position at which the variable is read on the substrate. Wafer mapping, for example, has traditionally been done by plotting the pass/fail data (i.e. yield) or other variable of interest versus the die position on the wafer. These wafer maps can be enhanced by combining values from many wafers in what is known as a stacked map. Recently there have been improvements in substrate mapping that can combine data from many wafers and many devices into what is known as a high-resolution wafer profile. Such substrate profiles are created from databases of information that is associated with substrates.
A graphical representation is developed from the information, which representation depicts the yield or other variable read from the devices on the substrate, according to their position on the substrate. Substrate profiles such as these look somewhat like a topographical map, where the various contours of the profile delineate areas of different average (or otherwise computed) yield or other measured variable of interest for the devices bounded by those contours on the substrates. Another common data display approach is to use a different color to represent die or contours of the wafer having similar values. The methods described herein can be used with standard wafer maps, stacked wafer maps, or substrate profiles.
Yields on substrates, such as for integrated circuits on wafers, frequently follow patterns across the substrate. Analysis of the pattern of yield or other measured parameters on the substrates is useful in determining the source of process variations or yield loss. An observed pattern can sometimes be matched against the physical characteristics of a process in the integrated circuit fabrication process, or against previously known patterns that the processes can produce. It is appreciated that in many instances herein, the term “map” includes both maps and profiles as described above. It is also appreciated that the term “yield” as used herein generally includes a variety of concepts in addition to pass/fail yield, such as reliability data, measured electrical properties, customer return data, and final test data, to name a few.
One problem that often limits the usefulness of substrate pattern analysis is that the actual pattern being observed is in reality a combination of the patterns created by many processes during the processing of the substrates. A clear pattern is usually only observed if one pattern source has a much stronger effect than any of the other pattern sources that exist in the data sample set. Otherwise, clear patterns tend to cancel each other out. For example, the pattern of yield loss towards the edges of the substrate caused by one operation may be hidden by a pattern for yield loss towards the center of the substrate that is caused by another operation, making the final pattern appear to be uniformly low, rather than the combination of two separate problems.
One method that is typically used to attempt to improve the identification of substrate patterns is to use the data from only selected substrates, in an effort to eliminate multiple or conflicting patterns, and to then hope that any patterns that do exist will thereby stand out. Another method is to display a substrate map for different measurements, such as leakage values or driver currents instead of yield averages, in order to improve the definition of the yield patterns for specific problems.
However, the problems with the typical approaches given above are that none of them addresses the fundamental issue that there are typically multiple and conflicting patterns existing within the data that is gathered from any significant number of substrates. This situation arises, for example, from the more than three hundred process steps that are performed on a semiconductor wafer during the typical fabrication cycle of an integrated circuit. Further, a measurable parameter that provides a better pattern signal than average yield may not be available, or may not be tested on all devices.
What is needed, therefore, is a system for constructing, using, or interpreting substrate maps that reduces some of the problems mentioned above.